“CAN bus belongs to the category of field bus and is a serial communication network that effectively supports distributed control or real-time control. The CAN protocol has been incorporated into the ISO international standard (ISO11898). It is divided into physical layer, data link layer and application layer. The physical layer and data link layer protocols have been integrated in the chip, and data framing can be automatically completed by hardware. It can greatly reduce the workload of the software, so it is especially suitable for the field of industrial automation, especially for those industrial fields that emphasize low-level monitoring and control and require high reliability and good real-time performance under harsh conditions.
Authors: Wang Jianping; Tao Chun; Zhou Wei
1 Introduction to CAN bus
CAN (Controller Area Network) bus belongs to the category of field bus and is a serial communication network that effectively supports distributed control or real-time control. The CAN protocol has been incorporated into the ISO international standard (ISO11898). It is divided into physical layer, data link layer and application layer. The physical layer and data link layer protocols have been integrated in the chip, and data framing can be automatically completed by hardware. It can greatly reduce the workload of the software, so it is especially suitable for the field of industrial automation, especially for those industrial fields that emphasize low-level monitoring and control and require high reliability and good real-time performance under harsh conditions.
CAN bus has the following outstanding features:
• It can work in a multi-master node mode, any node on the network can be set as the master node to actively send information to other nodes.
• The message transmission does not contain the destination address. It is based on the whole network broadcast. Each receiving station can filter the message according to the data property identifier reflected in the message to decide whether to receive or not. At the same time, the message can be set to different sending priorities through the message identifier to meet different real-time requirements.
• Non-destructive bus arbitration and error delimitation, using existing products, the controller can automatically resolve bus conflicts and error delimitation, completely transparent to the user, while also distinguishing temporary and permanent failures, and automatically shut down the failed node.
• The communication distance can reach 10km (rate of 5kb/s), and the speed can reach 1MB/s (within a distance of 40m).
• In theory, the number of online nodes on the CAN bus is not limited. It has 2032 different message identifiers, but the specific number depends on the affordability of the physical layer. Usually, the number of nodes on the CAN bus can reach 110. The CAN bus system generally adopts a bus network topology, which has the advantages of simple structure, low cost and high system reliability. Its overall Model is shown in Figure 1.
2 Functional characteristics of CAN bus adapter card
The CAN bus communication adapter card is an intelligent communication card inserted in the ISA slot of the PC. It can easily connect the PC to the CAN bus. Its characteristics are as follows:
(1) Using high-performance 8-bit microprocessor 89C52 (12MHz), it can reduce the communication burden of the PC host, and can run complex user communication tasks. (2) The card has a high-speed dual-port RAM memory of lkB, which can be directly mapped to the host memory space to realize high-speed data exchange between the CAN bus and the host PC, and can set the base address of the dual-port RAM in the ISA bus.
(3) When using 16MHz CAN controller SJAl000, its communication rate can be as high as 1Mbps.
(4) The interrupt application circuit can ensure that the microprocessor on the PC and the adapter card can process the processing requirements of the other party in real time.
(5) Optical isolation is provided on the adapter card, which can protect the PC from damage caused by ground circulation and enhance the reliability of the system in harsh environments.
(6) In order to facilitate system debugging, LEDs can be used to indicate system status and CAN receiving and sending status.
3 Hardware design of CAN bus adapter card
The CAN communication adapter card is composed of dual-port RAM circuit, microcontroller circuit, and CAN communication control circuit. Its structural block diagram is shown in Figure 2.
3.1 Dual-port RAM and its control circuit
Dual-port RAM is a fast communication device with superior performance, it can provide two completely independent ports, each port has complete address, data and control lines. For the user CPU on both sides of the device, it is not much different from the general RAM. Only when the same address unit is read and written on both sides at the same time, there will be competition. In the CAN communication adapter card, the dual-port RAM IDT7130 is usually used to establish a two-way data exchange channel to realize the data transfer between the PC and the CAN controller.
There are two ways to interface the PC and the extended memory: one is to treat the dual-port RAM as an external device and use the port I/O instructions to access, this method can only transmit one byte (or word) at a time, so the transmission speed Slower; the other is the memory mapping method, that is, the dual-port RAM address is configured at the high end of the PC’s main memory (usually C0000H-DFFFFH), so that the PC can access the dual-port RAM as if it were accessing the main memory. Instructions that can access main memory can also access dual-port RAM in the same way. The memory mapping method can be transmitted in units of character blocks, thus enabling fast access to dual-port RAM. Based on these advantages, the memory-mapped memory addressing method is adopted in the design of this adapter card.
Fig. 3 is the control circuit of dual-port RAM, and its access principle is: ISA bus has a total of 24 address lines, which can address 16MB storage space. Address line A12-A19 is connected to P0-P7 of the comparator 74LS688, Q0-Q5 of the comparator is connected to a six-bit DIP switch, and Q6 and Q7 are connected to high level. The output of 74LS688 is connected to the programmable logic device GALl6V8. In this way, when P0-7=Q0-7, the output of 74LS688 is low level, and the address selection is valid. In addition, by setting the DIP switch, the user can select the initial address of the dual-port RAM in the PC memory. If the DIP switch is set to Q0-5=001011, the initial address of the dual-port RAM in the ISA bus is D0000H. In this way, the various signals of the 1SA bus can be logically combined through the programmable logic device GAL16V8 to form three control signals, thereby realizing the access of the PC to the dual-port RAM. The three signals are:
P19=P1*P2*P3*P6*P7 RAM chip select signal
P18=P1*P2*P3*P6*P7*P5 RAM read signal
P17=P1*P2*P3*P6*P7*P4 RAM write signal
3.2 Microcontroller Circuit
Microcontroller 89C52 is a product of ATMEL company, it is fully compatible with MCS51 series CPU, and has 8k bytes of in-system programmable FLASH MEMORY (up to 100 times), and with 256B of on-chip RAM, so Generally do not need to expand the off-chip ROM.
When the 89C52 communicates with the CAN bus, a larger data buffer is usually required, so the system expands 8kB of off-chip RAM to meet the needs of communication.
In this adapter card, some data (such as the number of CAN nodes in the lower layer, initialization parameters of CAN communication, etc.) still need to be saved after the adapter card is powered off, so an EEPROM should be expanded. This card uses a 8k X 8-bit non-volatile memory 2864, its fast read time is up to 250ns, and the stored data can be saved for 10 years. If the program needs to reconfigure the communication parameters of the adapter card during the running process, it can be done by calling the PC to configure the CAN adapter card parameter configuration subroutine, and the corresponding parameters can be stored in 2864 when the setting is successful. To be called the next time the adapter card starts up.
Considering circuit debugging and handling of system faults, this card has designed three reset methods. The power-on reset method is to reset the CAN adapter at the same time when the PC is powered on; when there is a problem in debugging, it can be reset by the manual reset key to solve the problem in the debugging; the third is software reset, which can be reset by Call the initialization module in the PC management program and reset the CAN adapter card through software instructions.
3.3 CAN communication control circuit
The CAN communication controller selects sJAl000 from PHILIPS, which has all the necessary features required to complete the high-performance communication protocol, supports 4 different frame formats (ie data frame, remote frame, error frame and overload frame) stipulated by the CAN protocol, and has A simple bus-connected SJAl000 performs all the functions of the physical layer and data link layer, and ensures that the SJAl000 appears as a memory-mapped peripheral when connected to the CPU. In order to strengthen the differential transmission and reception capability of the CAN bus, the circuit adopts the CAN bus transceiver interface circuit 82C250. Pin 8 of the 82C250 allows the choice of three different working modes: high speed, slope control and standby, and can be set by setting the DIP switch. Switch between different ways of working. Connecting an optocoupler between SJAl000 and 82C250 can enhance the anti-interference ability of the system. The optocoupler can use high-speed optocoupler 6N137, and the two sides of the optocoupler should use a 5V DC-DC isolated power supply. Figure 4 shows a CAN communication interface circuit.
4 Software Design of Adapter Card
The adapter card is mainly responsible for the data forwarding task between the computer and the CAN node, so its software design also includes two parts: one is the application program on the PC side, which is used to complete the communication between the PC and the dual-port RAM. In fact, the runtime needs to develop a virtual device driver (VxD) to complete the reading and writing of the dual-port RAM, the processing of the dual-port RAM interrupt, and the communication with the application program. The second is the program design of the single-chip microcomputer on the card. The program is written by FranklinC51, which can complete the communication between the single-chip computer and the dual-port RAM and the CAN controller. Figure 5 is a simplified flow chart of the adapter card.