As early as 2018, Qualcomm had a cryptic hint, meaning don’t trust the chip manufacturing process of chip foundries too much, they like to make the numbers smaller now, TSMC and Samsung have similar problems.
In 2019, TSMC also admitted this problem. Huang Hansen, deputy general manager of technology research at the time, said that the current XXnm is not absolutely related to Transistor gates, and the process node has become a marketing game.
But to be honest, although TSMC admits that the so-called process node has problems, everyone still uses the process node to evaluate the chip technology of each foundry.
For example, in 2020, TSMC and Samsung will reach 5nm, while Intel is still at 10nm. Everyone thinks that Intel must lag behind Samsung and TSMC. In 2022, Samsung and TSMC will enter 3nm, while Intel may enter 7nm, obviously Intel is 2 generations behind.
But is TSMC and Samsung’s 3nm really 3nm? Is Intel’s 7nm really 7nm again? This is really confusing.
Fortunately, the outside world has another evaluation method for chip technology, that is, transistor density. We know that chips are composed of transistors, and the improvement of technology is aimed at reducing the channel length of transistors. The more advanced the technology, the shorter the channel length and the greater the transistor density.
So for a long time, when the processes claimed by these chip manufacturers are not credible, some authoritative organizations like to use transistor density to see everyone’s technical differences. The same density, the process is basically the same.
Recently, Digitimes analyzed the semiconductor process density of Samsung, TSMC, Intel and IBM, and compared the situation of 10nm, 7nm, 5nm, 3nm and 2nm. We found that perhaps only intel is innocent, and the processes of other companies are really watery. too big.
Why do you say that? As shown in the figure above, in terms of transistor density, Intel’s 10nm process has a transistor density of 106 million per square millimeter, which is stronger than Samsung and TSMC’s 7nm.
For Intel’s 7nm, the transistor density will reach 180 million per square millimeter, which is stronger than Samsung’s 3nm (170 million) and TSMC’s 5nm (173 million).
For Intel’s 5nm, the transistor density will reach 300 million per square millimeter, which is stronger than TSMC’s 3nm (290 million), and catches up with IBM’s previously announced 2nm process (333 million).
For Intel’s 3nm, the transistor density will reach 520 million per square millimeter, which is stronger than the 2nm process (490 million) announced by TSMC.
Regarding this transistor density, we can also reversely verify that the Kirin 9000 has 15.3 billion transistors, and its area is less than 100 square millimeters, which is about 170 million transistors per square millimeter, which is similar to TSMC’s 5nm process ( 173 million) are basically consistent.
It can be said that you really don’t need to pay too much attention to the 5nm and 3nm processes. It is really watery, and it is not easy to compare horizontally between companies. For example, Intel’s 10nm must be worse than Samsung’s 7nm? It’s hard to say. . It can only be compared vertically by the same company. For example, TSMC’s 5nm is definitely stronger than 7nm, and TSMC’s 3nm is definitely stronger than 5nm.
But no matter what, this marketing game of TSMC and Samsung is really successful. At least the average netizens have been successfully washed by them, and they have long believed that 3nm is 3nm.
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