Abstract: As a common equipment in life, the importance of elevators in safety performance and fault warning is self-evident. The causes of elevator failure and safety problems are very complex, and how to prevent them efficiently has become an urgent problem to be solved. This article will show how wireless communication can make a big difference in maintaining elevator safety.
For most residents living in high-rise buildings, the elevator is “the first step to go out and the last way to go home”. Although the accident rate of elevators causing casualties is extremely low, elevators, as one of the special equipments that people have a lot of daily contact with, are frequently used and pay more attention to, once a safety accident occurs, it will have a serious impact on social life.
Figure 1 Daily use of elevators
The reasons for elevator safety failures can be summed up in the following aspects: first, external reasons, such as power outages during elevator operation, and excessive temperature in the machine room; second, human reasons, such as elevator damage caused by decoration garbage, and elevator door deformation caused by barbaric handling , overload operation, etc.; the third is system reasons, such as elevator door lock failure, door machine failure, etc.
According to statistics from the China Elevator Industry Association, among the factors that cause elevator safety hazards, manufacturing quality accounts for 16%, installation accounts for 24%, and maintenance and use problems are as high as 60%. Frequent inspection and maintenance are the basic conditions for an elevator to be used for a long time, while less maintenance and maintenance are the main culprits of accidents.
Although the elevator maintenance unit will maintain the elevator on a regular basis, if the elevator fails, the rescue will be delayed and secondary damage will occur, and because the passengers do not describe the fault in place, it will affect the effective repair of the fault. How to effectively solve these kinds of failures and maintain the safety of users in efficient and low-cost elevators, wireless communication will shine in this regard.
The wireless elevator fault early warning system is mainly composed of three parts: sensor terminal acquisition node, wireless transmission gateway and remote monitoring center. The overall block diagram of the system is as follows:
Figure 2 System block diagram
The sensor terminal collection node is mainly composed of sensor nodes distributed in the elevator car and on the car top, which are responsible for monitoring the elevator operation parameters, and send the collected data to the gateway node through the zigbee wireless network. The wireless gateway node is then sent to the remote monitoring center through 3G/4G. The monitoring center stores, processes and displays the obtained elevator operation data, and analyzes whether the elevator is in a healthy running state. If the data is not within the safe range, the property company and the elevator maintenance unit will be notified immediately to deal with it in time to prevent dangerous accidents and prevent them from happening before they happen.
The zigbee module mainly sends the commands of the remote monitoring platform to each sub-node through the zigbee network, so as to manage each sub-node. At the same time, according to the situation of each node, the received node information is transmitted to the monitoring center for storage and data analysis and processing. The gateway node can perform corresponding data processing according to the node address in the data frame.
ZLG Zhiyuan Electronics’ zigbee high-performance module ZM32 is a high-performance zigbee transparent transmission module designed based on Silicon Labs EFR32MG1 series chips. The module has powerful hardware performance. The transmit power of up to 19dBm and the receive sensitivity of -99dBm ensure that the module can penetrate the wall. capability and a line-of-sight communication distance of over 3.3 km. In terms of mesh networking, the module can complete an ad hoc network of 100 devices within 100 seconds, and supports dynamic switching of three communication modes: short address, long address, and data frame address, making it more flexible to use.
Figure 3 ZM32 wireless module
Zigbee elevator fault diagnosis system fundamentally solves the chaos of “false maintenance” and “going through the motion maintenance”, and the emergency response speed is fast, from the perception layer, to edge computing, transmission, cloud computing to the final terminal platform, and finally No more than 1 second, which relies on the interaction between advanced perception technology, edge computing technology and cloud platform. On the edge side of the network near the perception data, a distributed open platform that integrates network, computing, storage, and application core capabilities provides edge intelligent services nearby, meeting the needs of elevator digitalization in agile connections, real-time services, data optimization, application intelligence, security and privacy. Critical needs in protection.
Press Release – June 5, 2017 – NI (National Instruments, or NI), a provider of solutions to the world’s toughest engineering challenges for engineers and scientists, today announced that it will begin operations in Hawaii. A quasi-5G waveform generation and measurement technique was demonstrated at the 2017 International Microwave Conference (IMS) in Honolulu. The demonstration will include signal generation and analysis representing the New Radio (NR) physical layer waveforms proposed by the Verizon 5G Technology Forum (5GTF) and 3GPP.
The technology demonstration will use the 1 GHz bandwidth PXIe-5840 second-generation vector signal transceiver (VST) with pre-5G software for waveform modulation and demodulation. Key features of waveform modulation include support for Discrete Fourier Transform-Spread Orthogonal Frequency Division Multiplexing (DFT-S-OFDM) and Orthogonal Frequency Division Multiple Access (OFDMA) and flexible subcarrier spacing to support 3GPP 5G NR and Verizon 5GTF specifications and component carrier configuration with a total bandwidth of 1 GHz. The demo supports modulation types up to 256-QAM, and measurements include power, adjacent channel power, and error vector magnitude. Typical applications for this demonstration include the testing of RFICs such as RF power amplifiers, front-end modules, and transceivers.
Charles Schroeder, vice president of wireless design and test at NI: “NI’s software-centric approach to test and measurement allows PXI test systems to be updated as software is updated. VST test system for LTE-A Pro products to test future 5G products.”
NI’s new 5G test technology complements its broad portfolio of RF and wireless test products, and new software complements existing 802.11a/b/g/j/n/p/ac/ax, Bluetooth GSM, UMTS, LTE /LTE-A, FM/RDS, GNSS test solutions. NI’s RF and wireless smart test systems are based on NI’s advanced VST technology to help engineers reduce test costs. These test systems will benefit from more than 600 PXI products in various operating frequency ranges from DC to mmWave. Using the PCI Express Gen 3 bus interface, they feature high-throughput data movement with sub-nanosecond synchronization and integrated timing and triggering. The high productivity of the LabVIEW and TestStand software environments, and a vibrant ecosystem of partners, add-on IP, and application engineers, help users dramatically reduce test costs, shorten time to market, and develop future-proof test equipment for tomorrow’s all kinds of challenges.
“If you are working on a project with an OLED Display, a barometric pressure sensor or a gyroscope/accelerometer module, you may find that the I2C bus is being used.
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If you are working on a project with an OLED Display, a barometric pressure sensor or a gyroscope/accelerometer module, you may find that the I2C bus is being used.
Introduction to the I2C bus
I2C combines the advantages of SPI and UART. Using I2C, you can connect multiple slave devices to a single master device (like SPI) and have multiple master devices control single or multiple slave devices. This is useful when you want to have multiple microcontrollers logging data to a single memory card or displaying text to a single LCD.
Like UART communication, I2C uses only two wires to transfer data between devices:
SDA (Serial Data) – The line on which the master and slave send and receive data.
SCL (Serial Clock) – The line that carries the clock signal.
I2C is a serial communication protocol, so data is transferred bit by bit along a single wire (SDA line).
Like SPI, I2C is synchronous, so the bit output is synchronized to the bit sampling by a clock signal shared between the master and slave. The clock signal is always controlled by the host.
How I2C Works
When using I2C, data is converted into messages, and messages are decomposed into data frames. Each message has an address frame containing the binary address of the slave, and one or more data frames containing the data being transferred. The message also includes start and stop conditions, read/write bits and ACK/NACK bits between each data frame:
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Start Condition: The SDA line transitions from high to low before the SCL line transitions from high to low.
Stop condition: After the SCL line switches from low to high, the SDA line switches from low to high.
Address Frame: A sequence of 7 or 10 bits unique to each slave that is used to identify the slave when the master wants to communicate with it.
Read/Write Bit: A single bit that specifies whether the master sends data to the slave (low voltage level) or the slave requests data (high voltage level).
ACK/NACK bit: Each frame in the message is followed by an Acknowledge/Non-Acknowledge bit. If the address frame or data frame is successfully received, an ACK bit is returned from the receiving device to the sender.
address
I2C doesn’t have a slave select line like SPI, so it needs another way to let the slave know that data is being sent to it, not another slave. It does this by address. The address frame is always the first frame after the start bit in a new message.
The master device sends the address of the slave device with which it communicates to each slave device connected to it. Each slave device then compares the address sent from the master device with its own address. If the addresses match, a low voltage ACK bit is sent back to the host. If the addresses do not match, the slave device does nothing and the SDA line remains high.
read/write bit
The address frame includes a bit at the end that informs the slave whether the master wants to write data to it or receive data from the master. The read/write bit is low if the master wants to send data to the slave. This bit is high if the master is requesting data from the slave.
data frame
After the master detects the ACK bit from the slave, it is ready to send the first data frame.
Data frames are always 8 bits long and sent MSB first. Immediately following the ACK/NACK bit of each data frame to verify that the frame was successfully received. Before sending the next data frame, either the master or the slave must receive the ACK bit (depending on who sent the data).
After all data frames have been sent, the master can send a stop condition to the slave to stop the transmission. The stop condition is that after a low-to-high transition on the SCL line, the SDA line goes from low to high and the SCL line remains high.
I2C data transfer steps
1. The host sends data to each connected slave device, then switches the SDA signal from high to low, and then switches SCL from high to low.
2. The master sends each slave the 7 or 10-bit address of the slave it wants to communicate with, along with the read/write bits:
3. Each slave device compares the address sent by the master with its own address. If the addresses match, the slave returns the ACK bit by pulling the SDA line low by one bit. If the address of the master device does not match the address of the slave device, the slave device holds the SDA line high.
4. The master device sends or receives data frames:
5. After each data frame has been transmitted, the receiving device returns another ACK bit to the sender to confirm successful receipt of the frame:
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6. To stop the data transfer, the master sends a stop condition to the slave by toggling SCL high before toggling SDA high:
Single master with multiple slaves
Since I2C uses addressing, multiple slave devices can be controlled from a single master device. With 7-bit addresses, 128 (27) unique addresses can be used. Using 10-bit addresses is not common, but provides 1,024 (210) unique addresses. To connect multiple slaves to a single master, connect them like this, using 4.7K ohm pull-up resistors to connect the SDA and SCL lines to Vcc:
There are multiple slave devices and multiple master devices
Multiple masters can be connected to a single slave or to multiple slaves. The problem of multiple masters in the same system occurs when two masters try to send or receive data simultaneously over the SDA line. To solve this problem, each master needs to detect whether the SDA line is low or high before sending a message. If the SDA line is low, it means that another master has control of the bus and the master should wait to send a message. If the SDA line is high, then it is safe to transmit the information. To connect multiple masters to multiple slaves, use the diagram below to connect the SDA and SCL lines to Vcc using 4.7K ohm pull-up resistors:
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Advantages and disadvantages of I2C
Compared to other protocols, I2C sounds complicated and is not easy to implement in a program causing problems such as data loss, no response, “dead, etc.”. But there are many advantages:
advantage
Use only two wires
Supports multiple masters and multiple slaves
ACK/NACK bits confirm that each frame was successfully transmitted
On October 15th, the first Chinasoft International Cloud Service Conference with the theme of “Cloud Symbiosis and Intelligence Leads the Future” was successfully held. This is the first large-scale technology event held by Chinasoft International since its establishment more than 20 years ago. Chinasoft International invited experts in the fields of economy and technology, strategic partners such as Huawei, and more than 2,000 customers to discuss hot topics such as digital economy development opportunities and enterprise digital transformation, aiming to jointly expand the value of the cloud and create a new future for the digital industry.
Riding the trend of auspicious clouds, climbing the digital peak
Over the past 20 years, Chinasoft International has been focusing on China’s software and industry informatization services. It has been ranked in the Gartner Global IT Services Market Share TOP100 and is one of the largest software and information technology service companies in China. At this cloud service conference, Chen Yuhong, Chairman and CEO of Chinasoft International, said: “Chinasoft International will continue to ride the wave of global digital transformation, continue to consolidate its basic business, and strive to make Chinasoft International the preferred solution for the digital transformation of the government and enterprise industries. supplier; and in the next 10 years, become the TOP10 player in the global IT service market, and achieve ‘one of the best in the world’”.
Chen Yuhong, Chairman and CEO of Chinasoft International
In order to seize the opportunity of cloud and intelligent industrialization transformation, Chinasoft International has carried out a series of strategic transformations, constructed three growth curves including “cornerstone business, cloud intelligent business and emerging business”, forming a quality, valuable and meaningful , symbiotic and co-promoting development matrix. At the same time, as HUAWEI CLOUD’s first partner in the same boat, it will continue to cooperate with HUAWEI strategically and be an outstanding member of HUAWEI’s “New Long March of Innovation and Technology” team. Chinasoft International will do a good job in the connection between cloud manufacturers and customers, take the cloud as the base, join hands with partners to serve customers, and ride the trend of auspicious clouds with customers and partners to climb the digital peak.
Huawei Zhang Ping’an: Deeply digging into digital and working together to help the future
Huawei Senior Vice President, Huawei Cloud CEO, and President of Consumer Cloud Services Zhang Ping’an shared the theme. Since 2017, Chinasoft International and Huawei Cloud have been in the same boat for four years. The in-depth understanding of customers brings HUAWEI CLOUD into the digital transformation process of enterprises, and continues to create value for customers. Chinasoft International has always been among the best in HUAWEI CLOUD sales and has contributed a very important force to the development of HUAWEI CLOUD. Deepening digitalization and realizing “everything is a service” is the goal of HUAWEI CLOUD. HUAWEI CLOUD hopes to work together with Chinasoft International to accelerate the digitalization of China’s industries, accelerate the process of “everything is a service”, and work together for the future.
Zhang Ping’an, Senior Vice President of Huawei, CEO of Huawei Cloud, and President of Consumer Cloud Services
Li Daokui: The rise of the fourth industry, digitalization has become a major strategic opportunity for Chinese enterprises
The game of international relations, coping with challenges in the post-epidemic era, and the development of the digital economy will all lead to new opportunities, new forms, and new models of industrial development. Li Daokui, Dean of the Institute of Chinese Economic Thought and Practice at Tsinghua University, analyzed the recent macro environment and policy changes, as well as the major opportunities facing Chinese companies in the new era. Li Daokui believes that the information service industry will grow into a “fourth industry” and drive the re-upgrading of the primary, secondary and tertiary industries. Seizing the challenges and opportunities brought by the digital economy will bring new opportunities for enterprises. The development of enterprises should have a sense of change, rationally analyze environmental changes, and seize the opportunities brought by environmental trends.
Li Daokui, Dean of the Institute of Chinese Economic Thought and Practice, Tsinghua University
Meet the third wave of the industry and create a future on the cloud with the drive of “product + service”
At this conference, Chinasoft International also showed its strength and confidence in leading the government-enterprise cloud service market. Sun Jiawei, Senior Vice President of Chinasoft International and President of Cloud Intelligence Business Group, said that the cloud industry is ushering in the third wave, and “no cloud, no strategy” has become an industry consensus. Chinasoft International and customer partners jointly innovate to provide three major cloud platform products and cloud management services, covering the entire chain of “cloud access, cloud management, and cloud innovation”. In order to match the long-term strategic goals of Chinasoft International, the cloud service brand CloudEasy has been fully upgraded to provide “full-stack” cloud service products and solutions for government and enterprise customers, becoming a leading brand in the cloud service market.
In order to help small and medium-sized enterprises to actively embrace the innovation opportunities brought by the digital wave, Chinasoft International’s online cloud service “Huaxia Cloud” announced its official commercial use on October 15. The basic functions of cloud management including 70+ functional modules will also be permanently free, reducing the overall cost. The cost and threshold for enterprises to use the cloud in the cloud can accelerate the process of cloud transformation.
Sun Jiawei, Senior Vice President of Chinasoft International and President of Cloud Intelligence Business Group
Released in-depth industry research reports and new concept white papers to point out the direction for digital transformation
Chinasoft International and IDC have conducted in-depth research on digital transformation and released a white paper on “Multi-Cloud Operation Service Providers”. It comprehensively expounds the challenges faced by enterprises in the digital era, as well as the role positioning and value of multi-cloud operation service providers, and then defines the capability standards of multi-cloud operation and service providers to provide enterprises with a selection reference, so that multi-cloud operators and enterprises can work together to win in the future.
Yang Lingling, Director of the Governance and Audit Department of the China Academy of Information and Communications Technology
Chinasoft International and the Academy of Information and Communications Technology jointly released the “New IT Governance Service System” white paper, which provides comprehensive guidance for enterprises to build a new IT governance structure. Yang Lingling, director of the Governance and Audit Department of the China Academy of Information and Communications Technology and the Institute of Big Data, mentioned that “the new IT governance focuses on the realization of enterprise value, the decision-making and management of the effective allocation of IT resources, and the improvement of IT productivity and the maximization of value.”
All-round “Circle of Friends Lineup” to discuss the best practices of digital transformation and the fruits of cooperation
In this cloud service conference, Chinasoft International invited customers and partners from all walks of life to participate in depth, sharing the results of cooperation with Chinasoft International and digital transformation practices.
Guizhou on the Cloud: A New Starting Point in the Era of Government Cloud 3.0
Cloud Guizhou has in-depth cooperation with Chinasoft International, leveraging Chinasoft International’s deep accumulation in cloud management, cloud operation and cloud native, etc., to take the lead in building a hybrid cloud computing resource scheduling platform based on Xinchuang architecture, and jointly explore and build the era of government cloud 3.0 new benchmark.
Zhangjiagang Smart City: Building a New Smart City Construction Model
Zhangjiagang actively enhances the level of urban development by empowering cities with smart capabilities, and has established a new digital transformation Model with urban digital platforms as common support and capability supply. Chinasoft International provides solid technical support for the construction of a smart city nerve center—digital platform and smart brain applications.
MCC Baosteel: A successful practice of digital transformation of traditional industries
As a pillar industry of the national economy, the iron and steel industry is particularly important for transformation and upgrading in order to develop from a big iron and steel country into a strong iron and steel country. The in-depth cooperation between MCC Baosteel and Chinasoft International has realized the visualization, management and control of data assets, and completed the upgrade of intelligent operation and maintenance, which is a successful practice of digital transformation of traditional industries.
Joining Blue Ocean: Joining Chinasoft International to Build an Industrial Internet Intelligent Cloud Platform
With Huawei cloud technology as the base and Chinasoft International application as the support, United Blue Ocean has formed a strategic cooperation “iron triangle”, data-driven manufacturing, and joined hands to build an industrial Internet intelligent cloud platform to achieve full coverage of horizontal industries and full access to vertical processes.
Wofeng Technology: Join hands with Chinasoft International to lead intelligent customer experience management
Wofeng Technology has joined hands with Chinasoft International to build a SaaS business for the whole process of marketing services, providing enterprises with one-stop solutions for marketing management, sales process management, service delivery management and customer service management, and also provides a reliable guarantee for the use of AI to achieve intelligent service upgrades .
Facing the future, Chinasoft International will continue to stand on the cusp of the rise of China’s digital economy. Based on the ecological concept of “jointly build a cloud ecosystem and win-win future on the cloud”, it will continue to do a good job in the connection between cloud manufacturers and customers, and use the cloud as the base. , fully understand the customer’s scenarios and needs, and work with partners to help China’s digital transformation, boost the construction of a digital society and digital economy, and lead the world.
Researchers at the Australian Centre for Robotic Vision (ACRV) in Queensland are using concepts of evolution and survival of the fittest to tailor a snake-shaped surgical robot directly to a patient’s anatomy, investigator Jonathan Roberts told Xinhua on Monday.
The groundbreaking project is the brainchild of ACRV doctoral researcher Andrew Razjigaev, who designed the first SnakeBot surgical unit for knee arthroscopy and presented it last year. The SnakeBot prototype includes three robotic arms that provide dexterity and vision for surgeons to maneuver on the inside of a patient’s knee.
Now, Razjigaev and his team use “evolution-based” algorithms to optimize the device by running computer simulations to determine which tools are best for patients. The algorithm works by examining 3D images of a patient’s knee, taken using a CT scanner or MRI, and then trying different iterations of the tool through a process that Roberts describes as “survival of the fittest.”
“We took a rough guess at a tool that we thought might work, changed it a bit at the beginning, and then we ran simulations and looked at which tools worked best,” Roberts said.
“The algorithm then uses some kind of evolutionary concept to create the next generation – it kills the worst, keeps some of the best, it randomly mutates the design of some of the best and makes random tweaks all over the place -It incorporates some great kids, so it’s like creating and creating kids.” Operators can then create 3D-printed and disposable tools that can be remotely controlled and fit perfectly to each patient.
Although the technology is still in the early stages of development and has yet to be tried out in patients, the team is optimistic that their research could have a huge impact and potentially apply it to other types of surgery. “Because we now have 3D printing and we have a relatively inexpensive way of making custom tools, the idea of using evolutionary algorithms to design these tools for a variety of different types of surgery now seems reasonable,” Roberts said. “
Recently, Redmi’s first Wi-Fi 6 router AX1800 passed 3C certification. One of its biggest highlights is that it supports Wi-Fi 6. Before Xiaomi launched the Wi-Fi 6 router AX3600, priced at 599 yuan, this time the Redmi brand also launched its own Wi-Fi 6 router.
Wi-Fi 6 (802.11ax) is a new generation of Wi-Fi standards. Compared with the previous generation Wi-Fi 5 (802.11ac), the transmission rate, signal coverage and data delay are greatly improved, especially when multiple terminal devices are used at the same time. When connected, Wi-Fi 6 routers can significantly reduce and reduce latency and lag on end devices.
Specifically, compared to Wi-Fi 5, Wi-Fi 6 has the following advantages:
1. Faster speed, the theoretical network throughput of Wi-Fi 6 is 2.7 times that of Wi-Fi 5, and the maximum can reach 9.6Gbps.
2. Support OFDMA technology, multi-device low-latency, multiple people open the black without jamming.
3. Better anti-interference, reduce interference by neighbors’ signals.
4, using WPA3 network encryption, more secure, anti-rubbing network.
5. Using TWT technology, the terminal is more power-saving.
The second highlight is the ultimate cost-effectiveness. Since the Redmi brand became independent, Lu Weibing, president of Xiaomi Group China and general manager of the Redmi brand, has repeatedly emphasized that Redmi insists on high quality and the ultimate cost-effectiveness.
Considering that the price of Xiaomi AX3600 is 599 yuan, the price of Redmi AX1800 may be lower than 500 yuan. Redmi’s first Wi-Fi 6 router supports Wi-Fi 6, will it usher in a different excitement?
With the tendering of smart meters by State Grid Corporation (hereinafter referred to as State Grid), the competition among meter manufacturers has become increasingly fierce, and the production cost has become one of their most concerned issues. Only by reducing costs can it be possible to occupy a favorable position in the low-price competition , and gradually increase profits. This puts the SoC in the spotlight.
Judging from the overall solution of the current State Grid single-phase smart energy meter, the high-cost Electronic materials are the real-time clock chip, ESAM security chip, MCU, metering chip, and LCD driver. The ESAM security chip is designated for the State Grid because of its security requirements, and does not have the conditions for integration. Although the measurement chip will eventually be integrated into the SoC chip, the State Grid is more cautious about this, and it is difficult to make a breakthrough in a short period of time. Therefore, the more pragmatic SoC solution at present is to integrate the LCD driver and the real-time clock chip. Most LCD driver IC manufacturers have similar products, and there is no technical difficulty. In terms of real-time clock, the chips used in single-phase smart meters are mainly EPSON 8025T, Intersil 12020M, and Maxim DS3231. The unit price is more than 7 yuan, the price is more expensive, but its performance index is high, within the range of -40 ℃ ~ 85 ℃ , the accuracy is better than 0.432s/d, much higher than the -25℃~60℃, 1s/d requirement of the State Grid. It is difficult, but not impossible, to achieve performance close to that of an external real-time chip in an SoC chip.
The timing accuracy of the real-time clock mainly depends on the characteristics of the clock source and how to make a compensation mechanism according to the characteristics of the clock source. The following two aspects are briefly introduced.
Since the real-time clock chip needs to work under the condition of battery power supply, power consumption becomes a very important consideration, and a tuning fork crystal oscillator with high ESR is usually used. The accuracy of the tuning fork crystal is affected by the following aspects.
Deviations in the production process lead to a shift in the frequency at room temperature. The frequency offset is generally around ±20PPM, and the accuracy is slightly higher at ±5PPM;
Influence of temperature: This part has the greatest influence, and the frequency offset and temperature are approximately parabolic;
Aging: Crystal accuracy will change over time. In the first year, the crystal accuracy will have a maximum variation of ±3PPM, and there will be a variation of ±10PPM during the entire service life;
Influence of excitation power: Excessive excitation power will affect the accuracy and life of the clock source, so the excitation power should be controlled within the acceptable range of the crystal oscillator. For the commonly used 32768 tuning fork crystal oscillator, the excitation power should be less than 1μW;
Load capacitance: including external load capacitance and PCB stray capacitance. The effect of load capacitance on frequency is called the traction ratio and can be expressed as:
Among them, CM is the dynamic equivalent capacitance of the crystal, C0 is the static capacitance of the crystal, and CL is the external load capacitance.
With the tendering of smart meters by State Grid Corporation (hereinafter referred to as State Grid), the competition among meter manufacturers has become increasingly fierce, and the production cost has become one of their most concerned issues. Only by reducing costs can it be possible to occupy a favorable position in the low-price competition , and gradually increase profits. This puts the SoC in the spotlight.
Judging from the overall solution of the current State Grid single-phase smart energy meter, the high-cost electronic materials are the real-time clock chip, ESAM security chip, MCU, metering chip, and LCD driver. The ESAM security chip is designated for the State Grid because of its security requirements, and does not have the conditions for integration. Although the measurement chip will eventually be integrated into the SoC chip, the State Grid is more cautious about this, and it is difficult to make a breakthrough in a short period of time. Therefore, the more pragmatic SoC solution at present is to integrate the LCD driver and the real-time clock chip. Most LCD driver IC manufacturers have similar products, and there is no technical difficulty. In terms of real-time clock, the chips used in single-phase smart meters are mainly EPSON 8025T, Intersil 12020M, and Maxim DS3231. The unit price is more than 7 yuan, the price is more expensive, but its performance index is high, within the range of -40 ℃ ~ 85 ℃ , the accuracy is better than 0.432s/d, much higher than the -25℃~60℃, 1s/d requirement of the State Grid. It is difficult, but not impossible, to achieve performance close to that of an external real-time chip in an SoC chip.
The timing accuracy of the real-time clock mainly depends on the characteristics of the clock source and how to make a compensation mechanism according to the characteristics of the clock source. The following two aspects are briefly introduced.
Since the real-time clock chip needs to work under the condition of battery power supply, power consumption becomes a very important consideration, and a tuning fork crystal oscillator with high ESR is usually used. The accuracy of the tuning fork crystal is affected by the following aspects.
Deviations in the production process lead to a shift in the frequency at room temperature. The frequency offset is generally around ±20PPM, and the accuracy is slightly higher at ±5PPM;
Influence of temperature: This part has the greatest influence, and the frequency offset and temperature are approximately parabolic;
Aging: Crystal accuracy will change over time. In the first year, the crystal accuracy will have a maximum variation of ±3PPM, and there will be a variation of ±10PPM during the entire service life;
Influence of excitation power: Excessive excitation power will affect the accuracy and life of the clock source, so the excitation power should be controlled within the acceptable range of the crystal oscillator. For the commonly used 32768 tuning fork crystal oscillator, the excitation power should be less than 1μW;
Load capacitance: including external load capacitance and PCB stray capacitance. The effect of load capacitance on frequency is called the traction ratio and can be expressed as:
Among them, CM is the dynamic equivalent capacitance of the crystal, C0 is the static capacitance of the crystal, and CL is the external load capacitance.
Common compensation mechanisms are divided into analog methods and digital methods
The main principle of the simulation method is to use the influence of the load capacitance on the frequency to achieve the purpose of compensating the frequency offset by increasing and decreasing the load capacitance. The advantage of this method is that the compensation is real-time, and every 32768kHz clock after compensation is accurate. However, the disadvantages are also obvious. The compensation range is limited. Too large or too small capacitance will bring stability problems. The nonlinearity of compensation and the compensation effect are related to the CM of the crystal itself, which will bring the complexity of batch adjustment.
A commonly used digital compensation mechanism is TTF (Digital Pulse Throughput Method), which compensates for timing accuracy through the number of throughput clocks. For example, for a 32768Hz clock source, it usually only needs to count 32768 pulses to output an accurate 1Hz signal, but when the oscillation frequency of the clock source increases from 32768Hz to 32769Hz, still counting 32768 pulses to output a 1Hz signal will obviously be too fast . At this time, you can output 1Hz by adding 1 pulse, that is, 32769 pulses. At this time, 1Hz is accurate. The compensation precision is 1/32768=30.5PPM. If you need to improve the compensation accuracy, there are two ways: 1) Increase the cycle time of the number of throughput pulses, such as from 1s to 60s, at this time the adjustment accuracy becomes 1/32768/60=0.51PPM, but the real-time performance is reduced; 2) Increase the frequency of the throughput pulse, such as a built-in 100 multiplier PLL circuit, the width of the increase of one pulse is only 1/100 of the original 32768Hz, and the compensation accuracy can reach 0.305PPM, but this will increase the power consumption. . The advantage of the digital compensation method is that it does not need to change the oscillator itself, the compensation range is large, and it does not bring stability problems, and the compensation effect is determined, independent of the crystal characteristics. The disadvantage is that the real-time performance and power consumption of compensation are difficult to guarantee at the same time.
At present, the real-time clock chips on the market use a combination of analog methods and digital low-frequency clock methods to achieve balance between real-time performance and power consumption due to the power consumption of battery applications. The disadvantage is that there are many factory adjustments. However, in the specific application of smart meters, it is not necessary to output 1Hz second pulses in the case of battery power supply. At this time, the real-time requirements for correction are not high, and the low-frequency pulse compensation method can be used to meet the requirements of power consumption. In the case of mains power supply, it is required to output stable and accurate 1Hz second pulses, but the power consumption is not high at this time, so high-frequency pulses can be used for output compensation, which makes full digital compensation possible.
The method adopted in this paper is the all-digital compensation method. The system structure diagram is shown in Figure 4.
The system uses the SoC chip SH79F6431 tailored by Zhongying Electronics for the State Grid.
The main resources of SH79F6431 are as follows:
Working voltage 2.4V~3.6V (some IO supports 5V for PLC interface);
JTAG online debugging;
64KB FLASH program storage space;
256B IRAM, 2816 XRAM;
3-way UART interface, one built-in infrared modulation circuit;
3-way timer, 2-way PWM, can be used to generate ESAM and CPU card clock;
Hardware IIC interface, convenient to communicate with LCD and EEPROM;
Built-in 4-channel 10-bit ADC, which can directly measure battery voltage internally;
Low-power hardware real-time clock with compensation;
Built-in high-speed PLL;
Built-in power-down detection reference source, convenient and accurate to detect external power-down;
Built-in power switching circuit;
Built-in 4*39 LCD driver;
ISP is supported.
In terms of resources, SH79F6431 can fully meet the application of single-phase electric energy meter of the State Grid. What is more special is that its RTC is a hardware RTC. Its operation is independent of the CPU and is not affected by various reset circuits. It can provide two power supply modes. Under the power consumption and real-time compensation mechanism. Under the condition of ensuring the mains power supply, each second pulse is accurate and stable, and the user interface is unified, which is very simple and easy to use. The user only needs to divide the frequency deviation to be corrected by 2.03 and write it into the correction register (RTCDATA) after rounding it up. .
In Figure 4, Rref, Rntc and C1 form a temperature measuring circuit for measuring the ambient temperature of the crystal. Considering the power consumption and self-heating issues, the impedances of Rref and Rntc are relatively large. Here, Rref uses a 100kΩ/0.1% resistor, Rntc uses 50kΩ, and C1 is 1000pF, which are used to meet the ADC input dynamic resistance requirements.
The oscillator uses Seiko VT-200F and 12pF, and the capacitor should use C0G capacitor with small temperature drift.
For the various factors that affect the clock accuracy mentioned above, the compensation method is as follows:
Process and load capacitance effects:
Measure the frequency offset B (in PPM) at normal temperature (about 25°C), and write B/2.03 into RTCDATA.
Effects of aging:
According to the actual working time and aging rate of the crystal, the aging compensation value can be obtained by dividing the frequency deviation caused by aging by 2.03, and after algebraically summing it with the normal temperature compensation value and the temperature compensation value, it is written into RTCDATA and compensated once a year.
The effect of temperature:
Use the temperature measurement circuit to measure the current temperature value, and find the frequency offset A caused by the temperature effect at the corresponding temperature according to the curve of temperature and crystal frequency changing with temperature. In the whole temperature range, to compensate and meet the requirements of the State Grid, it is necessary to ensure that the temperature is controlled within ±1°C.
The temperature characteristics of crystal oscillators are not ideal parabolas, and the temperature characteristics of various manufacturers are different. A large number of temperature experiments are required to obtain the temperature characteristics, and the workload is huge. Practice has shown that drawing a point every 5 ℃ can not only ensure the accuracy, but also greatly reduce the workload.
The compensation action can be performed once a minute under the mains power supply; under the battery power supply, taking into account the power consumption, it is generally enough once every fifteen minutes. The software flow of a compensation is shown in Figure 5.
Summary of this article
The built-in RTC compensation SoC solution based on SH79F6431 is simple and easy to implement, does not require complex operations, and greatly reduces the cost of independent RTC chips. At present, the scheme has passed the batch trial production verification, and its performance can be better than the requirements of the State Grid. In the whole temperature range, it can reach ±0.3s/d. The compensation effect depends on the temperature measurement accuracy and the consistency of materials.
At the just-concluded Arm’s annual DevSummit technology conference, Arm shared the great success of Project Cassini, as leading chip and device manufacturers in the IoT and infrastructure edge supply chain join in to collaborate on the project The number of partners has doubled, from 30 12 months ago to more than 70 now.
Arm partners have shipped more than 200 billion chips to date, mostly in devices used in everyday life. With the wide application of Arm technology in the field of IoT, it has further consolidated the realization of the scenario that “100% of the world’s shared data will soon be processed by Arm technology”.
Mohamed Awad, vice president of the IoT and Embedded Business Unit at Arm, said: “To realize the full potential of IoT and edge technology, it must scale at a faster rate of development and deployment than today. In delivering these systems, there is a There is a long list of challenges that need to be solved, including embedded software, cloud services, hardware design, connectivity, machine learning, security, etc., many of which are slow to be solved due to complexity, fragmentation or other issues. That’s why Arm launched Project Cassini in 2019, by uniting the industry to address key friction points in enabling cloud-native software experiences in a secure Arm edge ecosystem. What excites me most this year is that we’re seeing some focus on Partners in ‘far edge’ gateways and endpoints have also joined the program, including several of the world’s largest ODMs.”
Towards the cloud-native edge
The industry is well aware of the benefits of scalable, out-of-the-box blueprints in enabling large-scale software deployments, as well as enabling devices to be secure from the ground up through a consistent approach to API development. The development and adoption of the Cassini project clearly reflects the importance to the industry of its three development priorities, the first being standardization.
Arm SystemReady is a standardization initiative to ensure that operating systems are deployed to Arm architecture-based edge devices in a consistent manner so that hardware and software can operate under the hood of Arm-based technologies. Today, the program has achieved some important milestones:
Since launching the program last year in partnership with 2 early partners, 26 SystemReady devices in different categories have been certified.
Arm chip partners Ampere, Broadcom, Marvell, NXP, and Rockchip have certified SystemReady in evaluation kits for some of their leading chips, laying the foundation for their customers to more easily use these chips in their products Certified.
More than 10 leading ODMs have committed to use SystemReady to certify multiple products in their portfolio, including AAEON, Advantech, Avantek, Compulab, Gigabyte, Hawkeytech, Kontron, Lenovo, Pine64, Raspberry Pi and SolidRun , At present, there are dozens of commercial certified products in the market.
In addition to Red Hat, VMWare and Windows, other commercial operating systems now leveraging Arm SystemReady include Debian, Fedora, OpenSuse and Yocto Linux.
Security is critical to the scalable edge
For the scalable edge, security is as important as system standardization, especially as attacks on edge applications are becoming more frequent and sophisticated. There are now more than 80 PSA-certified products on the market from more than 50 partners, including chip suppliers, software suppliers and device manufacturers. This year, two partners, Silicon Labs and STMicroelectronics, achieved PSA Level 3 certification for the first time, achieving the highest level of security protection for IoT hardware and software, reflecting the industry’s significant investment in fundamental security.
Another key component of Project Cassini’s security is PSA-compliant Parsec, which enables software developers not only to maintain software portability, but also to take advantage of superior security features that can be directly applied to their applications. Parsec, the official sandbox project of the Cloud Native Computing Foundation (CNCF), was conceptualized by Arm and is now adopted by the open source community and integrated with operating systems such as Fedora, OpenSuse, and Yocto Linux.
Participate in driving innovation
A standardized approach to system architecture and security is the baseline for the Cassini project, and ecosystem collaboration brings true cloud-native reference implementations and blueprints to help developers realize the Arm-based vision of a secure edge. Numerous industry partners offer new reference implementations to support key edge use cases, including AI edge use cases developed with NVIDIA and Rancher, high-performance edge inference use cases developed with Redis, and VMware Co-developed computing integration application scenarios.
The success of the Cassini project at the infrastructure edge and the IoT market has already had ripple effects elsewhere. It is worth noting that the participation of the entire ecosystem is not limited to hardware companies such as chip suppliers and ODMs; numerous OEMs, Cloud Service Providers (CSPs) and other key software vendors are now fully participating in the Cassini project, with Arm Similar new projects led for the automotive and Cortex-M ecosystem:
Recently, Arm, in collaboration with automotive supply chain leaders, announced the Scalable Open Architecture for Embedded Edge (SOAFEE), a collaborative project based on the Cassini project that uses to define a cloud-native architecture compatible with the safety-critical and real-time requirements of software-defined vehicles.
The newly announced Project Centauri focuses on driving the exponential growth of Cortex-M-based devices. As a key component of the new Arm IoT comprehensive solution, the Centauri project combines standards, security and a broad software ecosystem to help Cortex-M-based systems achieve a similar contribution to the Cortex-A system by the Cassini project.
The diversity of the Arm ecosystem has brought about many of the technological innovations that are taken for granted today. The Cassini project aims to provide Arm partners with a scalable and secure framework for building the computing solutions of the future. The project will continue to advance standardization, security, and ecosystem collaboration to meet changing computing needs from cloud to edge to end devices.
“As more and more technologies are widely used in industrial automation, we have entered the era of Industry 4.0. New technologies are emerging to enable artificial intelligence and machine learning, data analytics, industrial networks, cybersecurity and functional safety. However, most industrial automation, at the heart of all other technologies, still relies on robotics and motion control.
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As more and more technologies are widely used in industrial automation, we have entered the era of Industry 4.0. New technologies are emerging to enable artificial intelligence and machine learning, data analytics, industrial networks, cybersecurity and functional safety. However, most industrial automation, at the heart of all other technologies, still relies on robotics and motion control.
Motion control and motor control often appear together, which can be a bit confusing. What is the difference between these two concepts? In industrial automation, how do we apply the right solution to one of the concepts, or both? Read on to learn the difference between motion control and motor control and how to make them work together.
What is motion control?
Motion control is a subsystem of an industrial automation system. It synchronously controls multiple motors to complete a series of movements. For example, a multi-axis robotic arm requires multiple motors to work together seamlessly to make a specific motion. Motion control is mainly used for trajectory planning, velocity planning, interpolation algorithms and kinematic transformations. Motion control systems are often found in printing, packaging and assembly applications.
As shown below, a motion control system typically consists of the following main components:
• A motion controller that generates trajectory plans and then provides control commands to motor drives. • A motor driver that converts a motion controller’s control command (usually a speed or torque signal) into a higher power voltage or current signal to drive the motor. • Several motors, which can execute movements according to control commands. • The position sensor provides the position/speed data of the motor rotor to the position/speed controller for precise position/speed control.
How to make the design of a new generation of intelligent, connected and safe industrial drives easy to use, please read this blog post >>
Motor Control and Motion Control
Motor control, on the other hand, is a system or technique that focuses more on controlling the rotation of a motor. A typical motor control system adjusts one or more parameters of torque, speed, and position of an individual motor to achieve target values. Depending on the type of motor, the requirements and technology to drive the motor can vary widely. Motor controllers usually have no planning capabilities (advanced drives only have simple position and velocity planning capabilities). So, a simple way to explain the difference between motor control and motion control is:
• Motor control is part of the motion control system (usually a current loop, operating in torque control mode) • However, sometimes we may confuse them because the position loop/velocity loop/torque loop for motor control can be used both in the motor controller and in the motion controller
Now that we know the differences between these two systems, it is clear that their design requirements and resources are also quite different.
Motor control is more focused on getting the motor to spin properly, or rather, commutate. To do this, the motor controller needs to interface with various sensors, process analog and digital signals, and generate waveforms to drive the motor. All of this happens within very short time loops, ranging from 50 microseconds to 300 microseconds.
However, motion control often acts as a system monitor, requiring commands between multiple motor controllers, data via Ethernet (EtherCAT and TSN), CAN, RS485, and other sources, as well as Human Machine Interface (HMI) panels communication between them. As mentioned above, motion controllers can also participate in some motor control tasks, such as controlling speed loops, position loops, and even torque loops. Therefore, the real-time control loop of a motion controller can vary from 100 microseconds to hundreds of milliseconds, depending on the actual task the motion controller is involved in.
Design of motion control system
The design of a motion control system can be quite complex, covering many aspects such as motor control, industrial networking, human-machine interfaces, codecs, information security, and functional safety. Therefore, it requires multiple control units to coordinate with each other in the system.
This is where a complete set of devices is needed for motion control designers to choose – and that’s where NXP and its broad portfolio of microcontrollers (MCUs) and microprocessors (MPUs) come in.
When it comes to motor controllers, NXP’s Kinetis V MCUs, Kinetis E MCUs, LPC MCUs and digital signal controllers (DSCs) offer a wide range of options, from controlling simple motors using the ARM Cortex-M0+ core, to using the Cortex-M33 core Or a high-efficiency DSC core running the FOC algorithm on dual motors. With the popular flashless i.MX RT crossover MCU, more motors can be precisely controlled simultaneously. These MCUs not only have a wide range of processing power to choose from, but also integrate peripherals that are ideal for motor control, such as high-speed, high-precision ADCs, high-speed comparators, flexible motor control timers and PWMs, and DSP accelerometers. Safety features such as fault detection and automatic shutdown work seamlessly with the industrial safety compliance provided by these devices.
Which MCU is best for your motor control design? For the latest solutions, download our comprehensive motor control guide >>
On the motion controller side, NXP offers i.MX RT crossover MCU and MPU product lines, including Layerscape and i.MX series processors. These devices support the integration of rich industrial communication interfaces such as Ethernet/IP, Profinet, EtherCAT and TSN. The multi-core architecture provides sufficient power for communication protocols, motion trajectory planning, and real-time loop control. They are also equipped with advanced timers to support multi-mode counting and flexible burst output.
As shown in the figure above, the motion control system can use a large number of MCUs and MPUs to implement multiple motor drivers to facilitate the coordinated motion of each robotic arm.
To speed up time-to-market for motion control systems, we desperately need a quick and easy way to proof-of-concept and prototyping. Therefore, NXP has been developing reference design platforms to provide rich industrial motion control functions and comply with industrial automation standards.
We recently introduced the i.MX RT industrial driver development platform, which is based on the i.MX RT crossover MCU with a foundation for multi-motor control, deterministic communication and compliance with the IEC 62443 safety standard. The quad-motor control development platform is available now and supports the full suite of NXP products, including i.MX RT crossover MCUs and EdgeLock SE050 secure elements. These devices work together to demonstrate the functions required in an industrial motor control system, such as power management, driving four motors, industrial communication interfaces, HMI touch Panel interface and safety integration.
In summary, this article introduces the definition of motion control, the difference between motor control and motion control, and industry trends in motion control system design requirements. Continue to follow NXP for more motor control solutions >>
author of this article
Daniel Hou, Technical Marketer in NXP Semiconductors’ Industrial Edge Processing Mass Market Team, supports emerging microcontroller and microprocessor use cases in the industrial segment. He has previously held positions in applied engineering and marketing in the semiconductor industry and holds a master’s degree in electrical engineering from the Rose-Hulman Institute of Technology.
According to the information on the Tianyancha website, on December 22, Huawei Technologies Co., Ltd. added a new patent information. The patent application number is 2019105341927, and the application publication number is CN112118073A. and digital processing chip patents”, the filing date is June 19, 2019, and the publication (announcement) date is December 22, 2020.
The patent abstract shows, “The embodiment of this application discloses a data processing method, an optical transmission device and a digital processing chip, which are used to improve the transmission performance of services…”.
